IBM Unveils World's First Sub-1 Nanometer Chip, Doubling Transistor Density

IBM claims it has delivered a step change in chip technology after creating the world's first sub-1 nanometer (nm) chip.

Building on the "nanosheet" architecture the company used in 2021 create a 2nm chip, IBM says its new "nanostack" design allowed it go even further and make a functioning 7 angstrom (or 0.7nm) chip. The result is a piece of silicon with twice the density of its previous 2nm design, packing nearly 100 billion transistors into a chip the size of a human fingernail. In practical terms, IBM says those additional transistors translate to a chip that offers either a "up to 50 percent more performance, or 70 percent greater energy efficiency than IBM's 2 nm node chips."

Jay Gambetta, director of IBM Research, said the new architecture would enable "a future where computing becomes significantly more powerful without a corresponding increase in energy."

The new nanostack architecture sees IBM building on its existing nanosheet transistor technology. The company found it could vertically stack and stagger those transistors. As depicted in the diagram below, each transistor is made up of three nanosheet elements that are approximately five nanometers thick, with about nine nanometers separating each of them. For further context, each nanosheet is made up of only 15 rows of silicon atoms.

IBM estimates it will take about five years before nanostack chips enter mass production. At the start of the year, Rapidus — the Japanese chipmaker the company partnered with to commercialize its existing nanosheet technology — said it was aiming to start producing 2nm chips at scale by the second half 2027, making the five-year estimate feel overly optimistic.

IBM said it would share more information about its commercialization plans in the future, but the company was adamant its new architecture would create a path for chipmakers to continue making more powerful and efficient silicon for at least the next decade.