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Peking University Researchers Develop All-Optical Interconnect System for Chips
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SCMP News59m agoTech1 min readChina

Peking University Researchers Develop All-Optical Interconnect System for Chips

Quick Look

  • Peking University researchers have created an all-optical interconnect system that links standard electronic chips, accelerating AI inference speeds by over 100 times and reducing computational resource needs by nine times.
  • Published in National Science Review, the system uses FPGA chips and custom hardware components for signal conversion.

AI-generated summary

Why It Matters

Chinese researchers have developed a new all-optical interconnect system linking standard electronic chips, boosting AI distributed inference speeds by over 100 times while using just one-ninth of the typical computational resources.

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Chinese researchers have developed a new all-optical interconnect system linking standard electronic chips, boosting AI distributed inference speeds by over 100 times while using just one-ninth of the typical computational resources.

As AI models permeate ever more applications, the industry’s appetite for computational power has grown insatiable. The conventional response has been to pile on more GPUs and build ever-larger data centres in a seemingly endless race for energy and brute force.

But a new study from Peking University suggests a radically different path: by optically linking chips with specific algorithms, they boost inference speeds by a factor of over 100 while slashing compute needs to just one-ninth.

The work was published in the journal National Science Review, and its corresponding authors include Shu Haowen and Wang Xingjun from Peking University. (A digital object identifier for the paper appears at the end of the story.)

The team’s “Lego” building blocks were Field-Programmable Gate Array (FPGA) chips: programmable devices widely used in fields that demand high parallel-processing capability, such as missile guidance, autonomous driving and data centres.

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The “joints” connecting these FPGAs are two custom-designed communication hardware components. The first is a silicon photonic transceiver chip running at 400 gigabits per second, responsible for converting electrical signals to optical and vice versa.

What to Watch

AI outlook — possibilities, not facts

  • Widespread adoption of optical interconnects in AI hardware.

    Likely · Medium term

Open Questions

  • Scalability of the system?
  • Commercialization timeline?
  • Integration with existing infrastructure?

Related Topics

This article was originally published by SCMP News.

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