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Huawei Unveils New Chip Architecture, Aims for 1.4nm Equivalence by 2031
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SCMP Tech5/25/2026Tech2 min readChina

Huawei Unveils New Chip Architecture, Aims for 1.4nm Equivalence by 2031

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  • Huawei has introduced a new Tau (τ) Scaling Law and LogicFolding architecture, aiming to achieve chip transistor density equivalent to 1.4nm processes by 2031.
  • This move is a significant step towards China's self-reliant semiconductor ecosystem, with new Kirin chips set to adopt the technology later this year.

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Why It Matters

Huawei Technologies has unveiled a new scaling law and chip architecture, aiming to achieve chip transistor density equivalent to 1.4nm processes by 2031. This is a significant step in the Chinese tech giant's mission to create a self-reliant semiconductor ecosystem.

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The Chinese tech giant’s new breakthrough is a major milestone in its mission to create a self-reliant semiconductor ecosystem

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Ann Caoin ShanghaiandIris Dengin Shenzhen

Published: 9:30am, 25 May 2026Updated: 11:33am, 25 May 2026

Huawei Technologies has unveiled a new scaling law and chip architecture that can bring its chips equivalent to a process node of 1.4 nanometre by 2031, in a key step by the Chinese tech giant to establish a self-reliant semiconductor ecosystem.

The company claims the new Tau (τ) Scaling Law, which was presented by He Tingbo, chair of Huawei Scientist Committee and president of the company’s semiconductor business department on Monday, is a new principle that guided “evolution of both semiconductors and electronic systems”.

During He’s keynote speech delivered at the 2026 IEEE International Symposium on Circuits and Systems (ISCAS) in Shanghai on Monday, she said Huawei had been using the new scaling law to design and mass produce 381 chips over the past six years.

Also dubbed “Her’s Law” by He’s peers, the new principle proposes a paradigm shift that replaced the traditional geometric miniaturisation of transistors with time (τ) scaling.

Based on the law, He also unveiled an innovative core technology called LogicFolding architecture, which can reduce the resistive and capacitive load of signal propagation, ultimately boosting transistor density.

The company expects its self-developed high-end chips, based on the new scaling law, to feature a transistor density equivalent to 1.4 nm processes by 2031. Its new Kirin chips, which are scheduled to launch later this year, will be the first to adopt the LogicFolding architecture with enhanced chip performance, He added.

What to Watch

AI outlook — possibilities, not facts

  • Huawei's new Kirin chips will feature enhanced performance due to the LogicFolding architecture.

    Very likely · Within days

  • Huawei will achieve transistor density equivalent to 1.4nm processes by 2031.

    Likely · Within years

Open Questions

  • What are the specific technical details and performance benchmarks of the LogicFolding architecture?
  • How will this new technology impact Huawei's global market share and competition with other chip manufacturers?
  • What are the potential geopolitical implications of China's increased self-reliance in semiconductor technology?
  • Will the new Kirin chips meet or exceed performance expectations upon their launch?

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This article was originally published by SCMP Tech.

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